26th. INTERNATIONAL  SYMPOSIUM ON MULTIPLE-VALUED LOGIC
                   May 29 - 31, 1996. 
 
                         and

1996 Workshop on Post Binary Ultra-Large Scale Integration (ULSI'96)
                     May 28, 1996

                 Santiago de Compostela
                        Spain


                        ADVANCE PROGRAME



Tuesday, May 28:

10:00: ISMVL'96 On-site Registration
       ULSI'96 Sessions
13:00: Lunch
       ULSI'96 Sessions

19:30: Guided visit to the Cathedral
20:30: Reception, Council of Santiago de Compostela



Wednesday, May 29:

08:30 - 09:30  ISMVL'96 On-site Registration  
09:30 - 09:45  Opening Remarks
09:45 - 10:45  Invited Address: "As you like them: Connectives in Fuzzy Logic"

               Keynote Speaker:
               Prof. Dr. Claudi Alsina (Universitat Oberta de Catalunya)

11:00 - 11:30  Coffee break

11:30 - 12:45  Parallel Sessions 1A and 1B                    


SESSION 1A: Switching Theory

11:30   Verification of Multi-valued Logic Networks
        Rolf Drechsler (University of Freiburg, Germany)

11:55   New Interpolation Algorithms for Multiple-Valued Reed-Muller Forms
        Zeljko Zilic, Zvonko G. Vranesic (University of Toronto, Canada)

12:20   Family of fast mixed arithmetic logic transforms for multiple-valued
        input binary functions
        Susanto Rahardja, Bogdan J. Falkowski 
        (Nanyang Technological University, Singapore)

SESSION 1B: Logic I

11:30   Non-Archimedean Models of Lukasiewicz Logic
        Antonio Di Nola (University of Neaples, Italy)

11:55   A Necessary and sufficient condition for Lukasiewicz logic functions
        Noboru Takagi, Kyoichi Nakashima (Toyama Prefectural University),
        Masao Mukaidono (Meiji University, Japan)

12:20   Propositional skew Boolean logic
        R. J. Bignall, M. Spinks (Monash University, Australia)



13:00          Lunch
               Meeting of the Excecutive Committee

15:00 - 16:40  Parallel Sessions 2A and 2B                  


SESSION 2A: Fault Modeling, Fault Diagnosis

15:00   Fault Diagnosis System based on Sensitivity Analysis and Fuzzy Logic
        Luis J. de Miguel, Margarita Mediavilla, Jose R. Peran
        (University of Valladolid)

15:25   Fault Models for the Multi-valued Current Mode Circuit
        Yeong-Jar Chang, Chung Len Lee (National Chiao Tung University, Taiwan)
        Jwu E Chen (Chung-Hwa Polytechnic Institute, Taiwan)

15:50   Testability of Generalized Reed-Muller Circuits
        Elena V. Dubrova, Jon C. Muzio (University of Victoria, Canada)

16:15   Design of One-Vector Testable Binary Systems Based on Ternary Logic
        Mou Hu (Shanghai Tiedao University, China)


SESSION 2B: Decision Diagrams

15:00   Planarity in ROMDD's of Multiple-Valued Symmetric Functions
        Jon T. Butler, Jeffrey L. Nowlin (Naval Postgraduate School, USA)
        Tsutomu Sasao (Kyushu Institute of Technology, Japan)

15:25   Multiple-valued Decision Diagrams with Symmetric Variable Nodes
        D.M. Miller (University of Victoria, Canada)
        N. Muranaka (Kansai University, Japan)

15:50   A Method to Represent Multiple-Output Switching Functions 
        by using Multi-Valued Decision Diagrams
        Tsutomu Sasao (Kyushu Institute of Technology, Japan)
        Jon Butler (Postgraduate Naval School, USA)

16:15   Complex spectral decision diagrams
        Bogdan J. Falkowski, Susanto Rahardja
       (Nanyang Technological University, Singapore)

  
16:40 - 17:10  Coffee break

17:10 - 18:40  Parallel Sessions 3A and 3B                     


SESSION 3A: Circuits, Logic Design I

17:10   A ternary systolic product-sum circuit for GF(3^m) using neuron MOSFETs
        Noriaki Muranaka (Kansai University, Japan)
        Shigenobu Arai (Nintendo Co., Ltd., Japan)
        Shigeru Imanishi (Kansai University, Japan)
        D. Michael Miller (University of Victoria, Canada)

17:35   New MVL-PLA Structures based on Current-mode CMOS Technology
        Mostafa Abd-El-Barr, Muhammad Nayyar Hasan 
        (King Fahd University of Petroleum and Minerals, Saudi Arabia)

18:00   Design of highly parallel linear digital circuits based on
        a symbol-level redundancy
        Masami Nakajima, Michitaka Kameyama (Tohoku University, Japan)

18:25   On the Use of VHDL as a Multi-Valued Logic Simulator
        Come Rozon (Royal Military College of Canada)


SESSION 3B: Logic II

17:10   Commodious Axiomatization of Quantifiers in Multiple-valued Logic
        Reiner Haehnle (University of Karlsruhe, Germany)
 
17:35   The Incidence Propagation Method
        Weiru Liu (University of Ulster at Jordanstown, Ireland)

18:00   Approximative Conjunctions Processing by the Multiple-valued Logic
        Herman Akdag, Myriam Mokhtari (University of Paris, France)

18:25   Intuistionistic Counterparts of Finite-Valued Logics
        Matthias Baaz (University of Viena, Austria)
        Christian Fermuller (Stanford University, USA)


Thursday, May 30:

09:00 - 10:45  Special Session. "Helena Rasiowa. In memoriam"
               Invited Speakers:

               Prof. Dr. G. Malinowski (Lodz University, Poland)
               "Helena Rasiowa - a view of the academic trajectory and the
                influence upon Polish and international scientific community"

               Prof. Dr. J.M. Font (University of Barcelona, Spain)
               "On the contributions of Helena Rasiowa to Mathematical Logic"

               Prof. Dr. T. Sales (Polytechnical University of Cataluna, Spain)
               "From pure to approximate logic"

11:00 - 11:30  Coffee break

11:30 - 12:45  Parallel Sessions 4A and 4B                   

SESSION 4A: Algebra I

11:30   Associativeness versus Recursiveness
        V. Cutello (University of Catania, Italy)
        E. Molina, J. Montero (Complutense University of Madrid, Spain)

11:55   Rational Transitivity and its Models
        Hassan Bezzazi, Ramon Pino Perez (University of Lille, France)

12:20   Several Remarks on the Complexity of Set-Valued Switching Functions
        Dan A. Simovici (University of Massachusetts at Boston, USA)
        Corina Reischer (University of Quebec a Trois-Rivieres, Canada)


SESSION 4B: Artificial Intelligence, Reasoning.

11:30   Petri Net Representation of Fuzzy Reasoning under 
        Incomplete Information
        Alberto Bugarin, P. Cari~nena, Senen Barro 
        (University of Santiago de Compostela, Spain)

11:55   Weight Structures for Approximate Reasoning with Weighted Expressions
        Stephan Lehmke (University of Dortmund, Germany)

12:20   Reasoning in inconsistent stratified knowledge bases
        Salem Benferhat, Didier Dubois, Henri Prade
        (University Paul Sabatier, France)


13:00          Lunch
               Meeting of the Symposium Committee

15:00          Excursion   


Friday, May 31:

09:45 - 10:45  Invited Address: "Inference in Fuzzy Logic via
               Generalized Constraint Propagation"

               Keynote Speaker:
               Prof. Dr. Dr. h.c. Lotfi A. Zadeh (University of California, 
               Berkeley, USA)

10:45 - 11:15  Coffee Break

11:15 - 12:05  Parallel Sessions 5A and 5B                 


SESSION 5A: Algebra II

11:15   On Isomorphisms between the Lattice of Tolerance Relations
        and Lattices of Clusterings
        Helmut Thiele (University of Dortmund, Germany)

11:40   An Algebraic Approach to Hyperalgebras
        Ivo G. Rosenberg (University of Montreal, Canada)

SESSION 5B: Soft Computing

11:15   Wave-parallel computing technique for neural networks based on
        amplitude-modulated waves
        Yasushi Yuminaka, Yoshisato Sasaki (Gunma University, Japan)
        Takafumi Aoki, Tatsuo Higuchi (Tohoku University, Japan)

11:40   Design of multivalued circuits using genetic algorithms
        Wenjun Wang, Claudio Moraga (University of Dortmund, Germany)


12:10 - 12:55  Plenary Session

13:00          Lunch

15:00 - 16:40  Parallel Sessions 6A and 6B                    


SESSION 6A: Circuits, Logic Design II

15:00   Quaternary Universal-Literal CAM for Cellular Logic
        Takahiro Hanyu, Manabu Arakaki, Michitaka Kameyama
        (Tohoku University, Japan)

15:25   Multi-Valued Decoder Based on Resonant
        Tunneling Diodes in Current Tapping Mode
        Hao Tang and H. C. Lin (University of Maryland, USA)

15:50   Implementation of skew Boolean logic operations in 
        peristaltic CCD Logic
        M. Spinks, R. J. Bignall (Monash University, Australia)

16:15


SESSION 6B: Devices

15:00   A literal gate using resonant-tunneling devices
        T. Waho, K. J. Chen, M. Yamamoto (NTT LSI Laboratories, Japan)

15:25   A Multiple-Valued Ferroelectric Content-Addressable Memory
        Ali Sheikholeslami, P. Glenn Gulak (University of Toronto, Canada) 
        Takahiro Hanyu (Tohoku University, Japan)

15:50   Interband RTDs with Nanoelectronic HBT-LED
        Structures for Multiple-Valued Computation
        Lutz J. Micheel (Wright Laboratory, U.S. Air Force, USA)
        Hans L. Hartnagel (University of Darmstadt, Germany)

16:15   Low-Energy Logic Circuit Techniques for Multiple-Valued Logic
        K. Wayne Current, Vojin G. Oklobdzija, D. Maksimovic
        (University of California at Davis, USA)


16:40 - 17:10  Coffee Break

17:10 - 18:40  Parallel Sessions 7A and 7B                   


SESSION 7A: Algebra III

17:10   Polynomial Completeness Criteria in Finite Boolean Algebras
        Boris A. Romov (New York, USA)

17:35   Techniques of Computing Logic Derivatives for MVL-Functions
        Vladimir Shmerko, S. Yanushkevich 
        (Technical University of Szczecin, Poland)
        V. Levashenko, I. Bondar
        (Belarussian State Economic University, Republic of Belarus)

18:00   On the Lattice of Partial Clones on a Finite Set
        Lucien Haddad, Jean Fugere (Royal Military College of Canada)

18:25   The Deepest Repetition Free Decompositions of non-singular functions
        of finite-valued logics are almost coinciding
        Fedir Sokhatsky (Pedagogical Institute of Vinnytsia, Ukrainia)

SESSION 7B: Logic III

17:10   DT - An Automated Theorem Prover for Multiple-Valued First-Order
        Predicate Logics
        Stefan Gerberding (University of Darmstadt, Germany)

17:35   Logic expressions of monotonic multiple-valued functions
        Kyoichi Nakashima, Yutaka Nakamura,
        Noboru Takagi (Toyama Prefectural University, Japan)

18:00   Efficiently irreducible bases in multiple-valued logic
        Grant Pogosyan (International Christian University, Japan)

18:25   The Logical not-Polynomial Forms to represent Multiple-valued Functions
        Elena Zaitseva, Tatyana Kalganova 
        (Belarussian State Economic University, Republic of Belarus)
        Evgeny Kochergov (Institute on Problems of Criminology, Criminalistics
        and Forensic Expertise, Republic of Belarus)


20:00: Symposium Banquet


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sasao@cse.kyutech.ac.jp